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Silicon Labs /Series0 /EFM32GG /EFM32GG280F512 /EBI /ROUTE

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Interpret as ROUTE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EBIPEN)EBIPEN 0 (CS0PEN)CS0PEN 0 (CS1PEN)CS1PEN 0 (CS2PEN)CS2PEN 0 (CS3PEN)CS3PEN 0 (ALEPEN)ALEPEN 0 (ARDYPEN)ARDYPEN 0 (BLPEN)BLPEN 0 (NANDPEN)NANDPEN 0 (A0)ALB0 (A0)APEN0 (TFTPEN)TFTPEN 0 (DATAENPEN)DATAENPEN 0 (CSTFTPEN)CSTFTPEN 0 (LOC0)LOCATION

ALB=A0, APEN=A0, LOCATION=LOC0

Description

I/O Routing Register

Fields

EBIPEN

EBI Pin Enable
CS0PEN

EBI_CS0 Pin Enable
CS1PEN

EBI_CS1 Pin Enable
CS2PEN

EBI_CS2 Pin Enable
CS3PEN

EBI_CS3 Pin Enable
ALEPEN

EBI_ALE Pin Enable
ARDYPEN

EBI_ARDY Pin Enable
BLPEN

EBI_BL[1:0] Pin Enable
NANDPEN

NANDRE and NANDWE Pin Enable
ALB

Sets the lower bound for EBI_A enabling

0 (A0): Address lines from EBI_A[0] and upwards can be enabled via APEN.

1 (A8): Address lines from EBI_A[8] and upwards can be enabled via APEN.

2 (A16): Address lines from EBI_A[16] and upwards can be enabled via APEN.

3 (A24): Address lines from EBI_A[24] and upwards can be enabled via APEN.
APEN

EBI_A Pin Enable

0 (A0): All EBI_A pins are disabled.

5 (A5): EBI_A[4:L] pins enabled.

6 (A6): EBI_A[5:L] pins enabled.

7 (A7): EBI_A[6:L] pins enabled.

8 (A8): EBI_A[7:L] pins enabled.

9 (A9): EBI_A[8:L] pins enabled.

10 (A10): EBI_A[9:L] pins enabled.

11 (A11): EBI_A[10:L] pins enabled.

12 (A12): EBI_A[11:L] pins enabled.

13 (A13): EBI_A[12:L] pins enabled.

14 (A14): EBI_A[13:L] pins enabled.

15 (A15): EBI_A[14:L] pins enabled.

16 (A16): EBI_A[15:L] pins enabled.

17 (A17): EBI_A[16:L] pins enabled.

18 (A18): EBI_A[17:L] pins enabled.

19 (A19): EBI_A[18:L] pins enabled.

20 (A20): EBI_A[19:L] pins enabled.

21 (A21): EBI_A[20:L] pins enabled.

22 (A22): EBI_A[21:L] pins enabled.

23 (A23): EBI_A[22:L] pins enabled.

24 (A24): EBI_A[23:L] pins enabled.

25 (A25): EBI_A[24:L] pins enabled.

26 (A26): EBI_A[25:L] pins enabled.

27 (A27): EBI_A[26:L] pins enabled.

28 (A28): EBI_A[27:L] pins enabled.
TFTPEN

EBI_TFT Pin Enable
DATAENPEN

EBI_TFT Pin Enable
CSTFTPEN

EBI_CSTFT Pin Enable
LOCATION

I/O Location

0 (LOC0): Location 0

1 (LOC1): Location 1

2 (LOC2): Location 2

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data